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The pattern rules used by PSCF to compile a source file create both an object file with file name suffix .o and a corresponding dependency file with file suffix *.d. The resulting dependency file defines a makefile rule that lists all of the files that are prerequisites of the resulting object file, but no recipe. The pre-requisites of an object file are the files that are combined by the C preprocessor to create the translation unit that is compiled to create that object file. These prerequisites include both the associated *.cpp or *.cu source file and all of the header files and (in some cases) template implementation files that are directly or indirectly included into the source file via preprocessor #include directives.

The dependency file associated with an object file named Class.o defines a makefile rule that, is simplified form, might look something like this:

Class.o: Class.cpp Class.h Header1.h Header2.h ....

Here, Header1.h, Header2.h, etc. represent header files other than the header containing the class definition that are directly or indirectly included into Class.cpp.

A rule defined in a dependency file never contains a recipe. The recipe required to construct the associated object is instead inferred from an applicable pattern rule. Pattern rules for compiling source files with suffix .cpp and/or .cu files are defined in a pattern rule file named patterns.mk in the enclosing namespace level directory.

Though not shown in the above example, the paths to the target and prerequisites files are all given as absolute paths in all dependency files, i.e., as paths defined relative to the root of the entire filesystem. As a result, the paths in real dependency files are usually much longer than those shown in the above simplified example.

The list of prerequisites generated by the PSCF build system always includes the config.mk files located in the relevant build directory (src or bld), in addition to any source code file prerequisites. The configuration file is included as a prerequisite because this file defines makefile variables that control conditional compilation of some features. Changes in a relevant config.mk file can thus change the content of a translation unit that is passed to the compiler by the precompiler, and thus change change the resulting object code.

Makefiles contain include directives that include the dependency files for all object files that the makefile is responsible for creating. This is shown more explicitly in the discussion of makefiles. As a result, the make command is generally able to find a rule with a prerequisite list for every existing object file target it may need to update.

The list of prerequisites given in a dependency file is generated automatically by a script that calls the gcc compiler with an option that instructs the compiler to analyze C++ "#include" directives. This compiler option was specifically designed to allow the g++ compiler to be used to automatically generate prerequisite lists.

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